计算机体系结构:量化研究方法(英文版·第5版) [Computer Architecture:A Quantitative Approach,Fifth Edition] epub pdf mobi txt 电子书 下载 2024
发表于2024-11-09
计算机体系结构:量化研究方法(英文版·第5版) [Computer Architecture:A Quantitative Approach,Fifth Edition] epub pdf mobi txt 电子书 下载 2024
《计算机体系结构:量化研究方法(英文版·第5版)》特点:
更新相关内容以覆盖移动计算变革,并强调当今体系结构重要的两个主题:存储器层次结构和各种并行技术。
每章中的"Putting It All Together"小节关注了业界的各种技术,包括ARM Cortex-A8、Intel Core i7、NVIDIAGTX-280和GTX-480 GPU,以及一种Google仓库级计算机。
每章都设计了常规主题:能力、性能、成本、可依赖性、保护、编程模型和新趋势。
书中包括3个附录,另外8个附录可以在原出版社网站在线得到。
每章后都设置了由工业界和学术界专家提供的经过更新的案例研究,以及与之配套的全新练习题。
“本书之所以成为永恒的经典,是因为它的每一次再版都不仅仅是更新补充,而是一次全面的修订,对这个激动人心且快速变化领域给出了及时的信息和独到的解读。对于我来说,即使已有二十多年的从业经历,再次阅读本书仍自觉学无止境,感佩于两位卓越大师的渊博学识和深厚功底。”
——Luiz Andre Barroso,Google公司
The pressure of both a fast clock cycle and power limitations encourages limited size for first-level caches. Similarly, use of lower levels of associativity can reduce both hit time and power, although such trade-offs are more complex than those involving size.
The critical timing path in a cache hit is the three-step process of addressing the tag memory using the index portion of the address, comparing the read tag value to the address, and setting the multiplexor to choose the correct data item if the cache is set associative. Direct-mapped caches can overlap the tag check with the transmission of the data, effectively reducing hit time. Furthermore, lower levels of associativity will usually reduce power because fewer cache lines must be accessed.
Although the total amount of on-chip cache has increased dramatically with new generations of microprocessors, due to the clock rate impact arising from a larger L1 cache, the size of the L1 caches has recently increased either slightly or not at all. In many recent processors, designers have opted for more associativity rather than larger caches. An additional consideration in choosing the associativity is the possibility of eliminating address aliases; we discuss this shortly.
One approach to determining the impact on hit time and power consumption in advance of building a chip is to use CAD tools. CACTI is a program to estimate the access time and energy consumption of alternative cache structures on CMOS microprocessors within 10% of more detailed CAD tools. For a given minimum feature size, CACTI estimates the hit time of caches as cache size varies, associativity, number of read/write ports, and more complex parameters. Figure 2.3 shows the estimated impact on hit time as cache size and associativity are varied.
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计算机体系结构:量化研究方法(英文版·第5版) [Computer Architecture:A Quantitative Approach,Fifth Edition] epub pdf mobi txt 电子书 下载 2024
计算机体系结构:量化研究方法(英文版·第5版) [Computer Architecture:A Quantitative Approach,Fifth Edition] 下载 epub mobi pdf txt 电子书 2024计算机体系结构:量化研究方法(英文版·第5版) [Computer Architecture:A Quantitative Approach,Fifth Edition] mobi pdf epub txt 电子书 下载 2024
计算机体系结构:量化研究方法(英文版·第5版) [Computer Architecture:A Quantitative Approach,Fifth Edition] epub pdf mobi txt 电子书 下载有些页面印刷倾斜了o,没办法
评分经典书籍,cpu学习必备,就是太贵,英文不好会吃力的
评分正在研究中。。。。 正在研究中。。。。
评分经典教材,老师要求买的,应该 不错
评分里面的思想很重要,利用实例解释思想。
评分京东发货快,包装好!书本身也特别好!
评分书的质量很不错,学习需要,还没细看
评分太难了!不过听人说这本书很好所以买的,
评分谢谢京东的活动了,翻翻看了!
计算机体系结构:量化研究方法(英文版·第5版) [Computer Architecture:A Quantitative Approach,Fifth Edition] epub pdf mobi txt 电子书 下载 2024